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 STW20NM50FD
N-CHANNEL 500V - 0.22 - 20A TO-247 FDmeshTM Power MOSFET (with FAST DIODE)
TYPE STW20NM50FD
s s s s s s
VDSS 500V
RDS(on) <0.25
ID 20 A
TYPICAL RDS(on) = 0.22 HIGH dv/dt AND AVALANCHE CAPABILITIES 100% AVALANCHE TESTED LOW INPUT CAPACITANCE AND GATE CHARGE LOW GATE INPUT RESISTANCE TIGHT PROCESS CONTROL AND HIGH MANUFACTURING YIELDS
3 2 1
TO-247
DESCRIPTION The FDmeshTM associates all advantages of reduced on-resistance and fast switching with an intrinsic fastrecovery body diode. It is therefore strongly recommended for bridge topologies, in particular ZVS phaseshift converters. APPLICATIONS s ZVS PHASE-SHIFT FULL BRIDGE CONVERTERS FOR SMPS AND WELDING EQUIPMENT
INTERNAL SCHEMATIC DIAGRAM
ABSOLUTE MAXIMUM RATINGS
Symbol VDS VDGR VGS ID ID IDM (q) PTOT dv/dt(1) Tstg Tj Parameter Drain-source Voltage (VGS = 0) Drain-gate Voltage (RGS = 20 k) Gate- source Voltage Drain Current (continuos) at TC = 25C Drain Current (continuos) at TC = 100C Drain Current (pulsed) Total Dissipation at TC = 25C Derating Factor Peak Diode Recovery voltage slope Storage Temperature Max. Operating Junction Temperature Value 500 500 30 20 14 80 214 1.42 20 -65 to 150 150
(1)ISD 20A, di/dt 400A/s, V DD V(BR)DSS, Tj TJMAX. (*)Limited only by maximum temperature allowed
Unit V V V A A A W W/C V/ns C C
(*)Pulse width limited by safe operating area
June 2002
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THERMAL DATA
Rthj-case Rthj-amb Tl Thermal Resistance Junction-case Thermal Resistance Junction-ambient Max Max 0.585 30 300 C/W C/W C
Maximum Lead Temperature For Soldering Purpose
AVALANCHE CHARACTERISTICS
Symbol IAR EAS Parameter Avalanche Current, Repetitive or Not-Repetitive (pulse width limited by Tj max) Single Pulse Avalanche Energy (starting Tj = 25 C, ID = IAR, VDD = 35 V) Max Value 10 700 Unit A mJ
ELECTRICAL CHARACTERISTICS (TCASE = 25 C UNLESS OTHERWISE SPECIFIED) OFF
Symbol V(BR)DSS IDSS IGSS Parameter Drain-source Breakdown Voltage Zero Gate Voltage Drain Current (VGS = 0) Gate-body Leakage Current (VDS = 0) Test Conditions ID = 250 A, VGS = 0 VDS = Max Rating VDS = Max Rating, TC = 125 C VGS = 30V Min. 500 1 10 100 Typ. Max. Unit V A A nA
ON (1)
Symbol VGS(th) RDS(on) Parameter Gate Threshold Voltage Static Drain-source On Resistance Test Conditions VDS = VGS, ID = 250A VGS = 10V, ID = 10A Min. 3 Typ. 4 0.22 Max. 5 0.25 Unit V
DYNAMIC
Symbol gfs (1) Ciss Coss Crss Coss eq. (2) Rg Parameter Forward Transconductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Equivalent Output Capacitance Gate Input Resistance VGS = 0V, VDS = 0V to 400V f=1 MHz Gate DC Bias=0 Test Signal Level=20mV Open Drain Test Conditions VDS > ID(on) x RDS(on)max, ID = 10A VDS = 25V, f = 1 MHz, VGS = 0 Min. Typ. 9 1380 290 40 130 2.8 Max. Unit S pF pF pF pF
1. Pulsed: Pulse duration = 300 s, duty cycle 1.5 %. 2. Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0 to 80% VDSS.
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ELECTRICAL CHARACTERISTICS (CONTINUED) SWITCHING ON
Symbol td(on) tr Qg Qgs Qgd Parameter Turn-on Delay Time Rise Time Total Gate Charge Gate-Source Charge Gate-Drain Charge Test Conditions VDD = 250V, ID = 10 A RG = 4.7 VGS = 10V (see test circuit, Figure 3) VDD = 400V, ID = 20A, VGS = 10V Min. Typ. 22 20 38 18 10 53 Max. Unit ns ns nC nC nC
SWITCHING OFF
Symbol tr(Voff) tf tc Parameter Off-voltage Rise Time Fall Time Cross-over Time Test Conditions VDD = 400V, ID = 20 A, RG = 4.7, VGS = 10V (see test circuit, Figure 5) Min. Typ. 6 15 30 Max. Unit ns ns ns
SOURCE DRAIN DIODE
Symbol ISD ISDM (2) VSD (1) trr Qrr IRRM Parameter Source-drain Current Source-drain Current (pulsed) Forward On Voltage Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current ISD = 20 A, VGS = 0 ISD = 20 A, di/dt = 100A/s, VDD = 60V, Tj = 150C (see test circuit, Figure 5) 245 2 16 Test Conditions Min. Typ. Max. 20 80 1.5 Unit A A V ns C A
Note: 1. Pulsed: Pulse duration = 300 s, duty cycle 1.5 %. 2. Pulse width limited by safe operating area.
Safe Operating Area
Thermal Impedance
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Output Characteristics Transfer Characteristics
Transconductance
Static Drain-source On Resistance
Gate Charge vs Gate-source Voltage
Capacitance Variations
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Normalized Gate Thereshold Voltage vs Temp. Normalized On Resistance vs Temperature
Source-drain Diode Forward Characteristics
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Fig. 1: Unclamped Inductive Load Test Circuit Fig. 2: Unclamped Inductive Waveform
Fig. 3: Switching Times Test Circuits For Resistive Load
Fig. 4: Gate Charge test Circuit
Fig. 5: Test Circuit For Inductive Load Switching And Diode Recovery Times
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TO-247 MECHANICAL DATA
mm. MIN. 4.85 2.20 0.40 1 3 2 2 3 10.90 15.45 19.85 3.70 18.50 14.20 34.60 5.50 2 5 60 3.55 3.65 0.14 3 0.07 5 60 0.143 14.80 0.56 1.36 0.21 0.11 15.75 20.15 4.30 0.60 0.78 0.14 0.72 0.58 2.40 3.40 0.07 0.11 0.43 0.62 0.79 0.17 TYP MAX. 5.15 2.60 0.80 1.40 MIN. 0.19 0.08 0.015 0.04 0.11 0.07 0.09 0.13 inch TYP. MAX. 0.20 0.10 0.03 0.05
DIM. A D E F F1 F2 F3 F4 G H L L1 L2 L3 L4 L5 M V V2 Dia
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Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a trademark of STMicroelectronics (c) 2000 STMicroelectronics - Printed in Italy - All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - China - Finland - France - Germany - Hong Kong - India - Italy - Japan - Malaysia - Malta - Morocco Singapore - Spain - Sweden - Switzerland - United Kingdom - U.S.A. http://www.st.com
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